As billions of transistors are integrated on a single die, Networks-on-Chip (NoCs) emerge as an efficient on-chip communication infrastructure. To complement the firmware and software level methods for rogue NoCs detection, we are investigating mechanisms to harden the NoC hardware design against tampering. We explore methods for the OCP-IP compatible network interface design, and hardware Trojan detection in NoC router.
Yu Q, Ampadu P. Dual-Layer Adaptive Error Control for Network-on-Chip Links. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20 (7) :1304-1317.
Yu Q, Frey J. Exploiting error control approaches for Hardware Trojans on Network-on-Chip links, in 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS). ; 2013 :266-271.
Frey J, Yu Q. Exploiting state obfuscation to detect hardware trojans in NoC network interfaces, in 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS). ; 2015 :1-4.