Yu Q, Ampadu P. Dual-Layer Adaptive Error Control for Network-on-Chip Links. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2012;20 (7) :1304-1317.

Yu Q, Ampadu P. A Dual-Layer Method for Transient and Permanent Error Co-Management in NoC Links. IEEE Transactions on Circuits and Systems II: Express Briefs. 2011;58 (1) :36-40.

Yu Q, Ampadu P. A Flexible Parallel Simulator for Networks-on-Chip With Error Control. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 2010;29 (1) :103-116.

Yu Q, Ampadu P. Adaptive error control for nanometer scale network-on-chip links. Computers & Digital Techniques, IET. 2009;3 :643 - 659.

Huo D, Yu Q, Wolpert D, Ampadu P. A Simulator for Ballistic Nanostructures in a 2-D Electron Gas. J. Emerg. Technol. Comput. Syst. [Internet]. 2009;5 (1) :5:1–5:21. Publisher's Version

J. Chen, P. Liu QYCSDZQY, Lai L. MD16: 16-Bit DSP Processor with Special RISC Philosophy. J. Circuits and Systems. 2007;12 (5) :65 - 71.

J. Chen. P. Liu, Q. Yao CSDZQY, Lai L. MD16: 16-Bit DSP Processor with Special RISC Philosophy. J. Circuits and Systems. 2007;12 (5) :65 - 71.

Q. Yu PL, Yao Q. Data Hazard Detection Method for DSP with Heavily Compressed Instruction Set. J. Zhejiang University (Engineering Science). 2005;39 (10) :1501 - 1506.